Semiconductor systems, such as semiconductor memory and processors, transmit data across data communication lines that are configured to have carefully matched impedance values. Variations in certain operating parameters such as temperature or the like can result in impedance mismatches that can adversely affect data transmission rates and quality. In order to mitigate these adverse scenarios, the semiconductor systems can include termination components that have programmable impedances, which can be adjusted based on a calibration process as operating conditions change. In some implementations, the impedances of the termination components are programmed based on voltage measurements made on a connection pad attached to an external connection (also referred to herein as an “external pin” or “pin”) of a semiconductor memory package. The external pin can connect to an external reference calibration device such as, for example, a resistor. However, the number of external pins that are available on the typical semiconductor memory package is limited and, typically, only one external reference calibration device per memory package is provided. In a case where the semiconductor system is a memory such as a SRAM or DRAM, the memory system can include a memory package that has multiple semiconductor components (e.g., semiconductor dies) that each contains one or more memory devices, which contain the memory cells and the termination components. In such memory systems, each memory device must share the external reference calibration device via the external pin when programming the respective termination component based on the results of the calibration process. However, as the number of memory devices that share the external reference calibration device increases, the calibration times for the memory systems can get very long.